The Direct Digital Synthesizer (DDS) is simple in concept: one stores a table of sine curve values (one cycles worth of values) which are consecutively read from the table and converted to a corresponding voltage. When the end of the table is reached, the process is repeated. Over time, the voltage output generates a continuous sine wave. Changing the rate at which the samples are read and converted changes the frequency of the sine wave. What could be easier?

Unfortunately, a variety of demons await the unsuspecting designer. To see why, we must define the process a little more carefully. Each voltage output is called a ’sample’. The number of samples per second is known as the sampling rate. Suppose there are N entries in the table for one cycle of the sine wave. The output frequency of the sine wave, f, will then be the sampling rate, Fs, divided by N.

                                                                 f = Fs/N

The voltage output of the DDS is generated by a digital to analog converter. After a sample is output, the voltage remains constant until the next sample is output. The resulting sine wave has a stair-step quality to its shape. The smoothness of the sine wave depends upon the number of entries in the table, and the number of bits of precision of each entry (or the number of bits the digital to analog converter can handle).

The stair-step nature of the sine wave means it is not a pure, single, frequency sine wave. We might guess that the non-sinusoidal nature indicates there will be harmonics present (integer multiple frequencies of the desired frequency), however, this turns out not to be the case. The frequency spectrum is a bit more complicated. Suppose the sampling rate is 10 MHz, and our sine wave is 1 MHz. This means our table has 10 samples for each cycle. Analysis of the frequency content of our stair-step sine wave shows our desired 1 MHz signal, but it also includes a number of other frequencies almost as prominent as the one we want, namely: 9 MHz, 11 MHz, 19 MHz, 21 MHz, 29 MHz, etc. The pattern here is pretty obvious: every 10 MHz frequency segment includes 2 output frequencies, one that is 1 MHz up from the bottom end, and one that is one MHz down from the top end. To produce a “pure” sine wave, a good quality filter must be used to eliminate all but the desired frequency. Typically, this is a low pass filter, often containing 4 poles or more. A clever designer, however, can use a band pass filter tuned to any one of the the output frequencies. Note that this limits the useful output range of the DDS. For example, with a sample frequency again of 10 MHz, but a desired output of 4 MHz, the actual outputs will be at 4, 6, 14, 16, etc. To obtain a pure 4 MHz, the 6 MHz must be removed. This requires a very good filter.

Rather than increasing the sample rate to increase the output frequency, the DDS devices provide a means to select every other sample from the table (count by 2s), or every third sample, etc. This runs through the table faster converting fewer table values per cycle. If the table only includes 10 samples, this is not too useful, but if it holds 10,000,000 samples for a cycle, this is very useful. At each sample time, the user specified increment, n, is added to an internal ‘phase counter’ to keep track of where to look in the sample table. Modern devices use compressed tables along with clever mathematical techniques that produce effective table sizes of billions of samples for one cycle of a sine wave. The output frequency is now given by:

                                                                 f = n x Fs / N

Other sources of difficulty lie in wait for those seeking ultra pure sine waves. Inaccuracies in the analog to digital converter produce unwanted frequencies called ’spurs’, as does the conversion process when the phase counter is truncated to the number of bits used by the analog to digital converter. These spurs, usually of pretty low level, produce ‘phase jitter’ in the resulting sine wave, which may cause difficulties in some applications. Techniques exist to mitigate some of these effects, but designers of high performance systems must be aware of them and the limitations they may impose.

Modern DDS devices use high frequency clock rates. For example, the Analog Devices AD9851 operates with a sample rate of 180 MHz, and can generate sine waves up to 90 MHz, but in practice 60 MHz is a useful upper limit (the first extra output is then at 120 MHz and can be removed by a low pass filter). Other devices are available with much lower, or much higher sample rates.

http://www.analog.com/en/rfif-components/direct-digital-synthesis-dds/ad9851/products/product.html
http://www.amqrp.org/kits/dds60/index.html

In its simplest form, linear programming is a technique for solving a set of mathematical inequalities subject to a particular optimization goal. Consider the following optimization problem: a company sells two products, A and B, and wants to make as much profit each week as possible. The company is just getting started and has space constraints for inventory, and budget constraints for both inventory purchase and labor.

If a and b represent the quantity of products A and B they can produce each week, the following constraints must be met:

inventory space:       2a + b <= 2000         since units of A take twice as much room as those of B,
inventory cost:            a + b <= 1400         since the unit materials cost the same amount,
labor cost:                        b <= 1000         since units of A require no labor,

and the profit is given by P = 3a + 2b, that is, units of A are more profitable.

This problem is directly solvable by standard ’simplex’ LP solvers. The solution to this problem is a = 600, b = 800, P = 3400, and the labor is idle 20% of the time, so a 4 day work week might be appropriate. Although a and b worked out to be integers in this problem, that is not always the case. But the answers, if decimal numbers, would still be close enough to be useful.

But now suppose that the inventory of A can only be purchased in lots of 250. What is the best solution?

The new constraint is a = 250c, where c must be an integer (the number of lots).

The LP solver does not allow integer constraints. Running it with this constraint would produce the same solution, with c = 2.4 (so that a = 250c = 600 as before.

This problem can still be solved, but it now requires use of a Mixed Integer Programming (MIP) solver. A MIP solver allows us to constrain the variable c to be an integer.

The new solution will be a = 500, b = 900, c = 2, P = 3300, with the labor idle only 10% of the time. These differences in the solution could be very important to the business.

In practice, these types of problems typically have many more variables and many more constraints, perhaps numbering in the hundreds or thousands.

As a final note, MIP solvers often take much longer to solve a problem than an LP solver, since the MIP solver runs iteratively, and each iteration calculates an LP solution. The art of MIP usage is knowing how to reduce the number of required iterations.

A good advanced text on MIP solver theory is “Production Planning by Mixed Integer Programming” by Pochet and Wolsey, published by Springer. Many high school algebra texts cover introductory graphical methods for the solution of simple LP problems.